Von Neumann architecture

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Early von Neumann computers[change | change source]

These are some examples of von Neumann model computers.

Evolution[change | change source]

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Von Neumann bottleneck[change | change source]

The common bus (essentially like a road for data) used by the program memory and data memory creates what is called the von Neumann bottleneck, which is the limit of the data transfer rate between the CPU and memory (think of it like a 100-km road between destinations). Because the program and data cannot be accessed at the same time, the data transfer rate is smaller than the rate the CPU can work, limiting the effective processing speed of the CPU. It is made to wait for the data it needs to be moved to or from memory.

The Von Neumann bottleneck can be avoided if data and program are transferred on separate buses. This is achieved by the Harvard architecture.

Alternative workarounds include having a small data cache built into the processor, and using complicated algorithms and logic to predict what will be needed next and get it before it is needed.

References[change | change source]