Von Neumann architecture

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von Neumann Architecture

The von Neumann architecture is a model of how computers work. It was developed by John von Neumann, and others in the 1940s. According to this model, a computer consists of two fundamental parts: There is a processor, which loads and executes program instructions, and there is computer memory which holds both the instructions and the data. The von Neumann architecture is probably the most common model that describes how most computers work today. As it was developed at Princeton University, it is also known as Princeton architecture, but that term is less common.

Another very similar architecture is the Harvard architecture, which separates the place where data is held from that where program instructions are held.

Von Neumann bottleneck[change | change source]

The common bus (essentially like a road for data) used by the program memory and data memory creates what is called the von Neumann bottleneck, which is the limit of the data transfer rate between the CPU and memory (think of it like a 100-km road between destinations). Because the program and data cannot be accessed at the same time, the data transfer rate is smaller than the rate the CPU can work, limiting the effective processing speed of the CPU. It is made to wait for the data it needs to be moved to or from memory.

The Von Neumann bottleneck can be avoided if data and program are transferred on separate buses. This is achieved by the Harvard architecture.

Alternative workarounds include having a small data cache built into the processor, and using complicated algorithms and logic to predict what will be needed next and get it before it is needed.

Early von Neumann computers[change | change source]

These are some examples of von Neumann model computers.

References[change | change source]